CV

Current work

I just finished my contract at Trustworthy Systems at UNSW in Sydney where I was tasked with developing new drivers and components for the sDDF tooling based on seL4 microkernel. Awaiting new challenges!

I am also a co-founder of Sticky Piston Studios — a jack-of-all-trades company where we make any advanced tech tick.

Skills

Education

MSc in Embedded Systems

I graduated with an MSc in Embedded Systems at KTH Royal Institute of Technology, Sweden and University of Turku, Finland as part of the EIT Digital Programme.

My thesis, “FPGA accelerated tcpdump using eBPF”, goes into the topic of hardware acceleration of packet capturing in an embedded Linux system using an FPGA. It was a cooperative effort between KTH and Tietoevry.

PDF: FPGA accelerated tcpdump using eBPF

BSc in Computer Science / Electronics

I also graduated from Warsaw University of Technology with the thesis: “FPGA based hardware accelerator for musical synthesis for Linux system”.

PDF: FPGA based hardware accelerator for musical synthesis for Linux system

Selected talks

Selected projects

Thesis abstracts

FPGA accelerated tcpdump using eBPF

With the rise of the Internet of Things and the proliferation of embedded devices equipped with an accelerator arose a need for efficient resource utilization. Hardware acceleration is a complex topic that requires specialized domain knowledge about the platform and different trade-offs that have to be made, especially in the area of power consumption. Efficient work offloading strives to reduce or at least maintain the total power consumption of the system. Offloading packet capturing is usually done in more powerful devices, hence scarce research is present concerning network packet acceleration in embedded devices.

The thesis focuses on accelerating networking packets utilizing a Field Programmable Gate Array in an embedded Linux System. The solution is based on a custom Linux distribution assembled using the Buildroot tool, specially configured and patched Linux kernel, uboot bootloader, and the programmable logic for packet acceleration. The system is evaluated on a De0-Nano System on Chip development board through modifications to burst lengths, packet sizes, and programmable logic clock frequency. Metrics include packet capturing time, time per packet, and consumed power. Finally, the results are contrasted with baseline embedded Linux packet processing by inspection of a packet’s path through the kernel.

PDF: FPGA accelerated tcpdump using eBPF

Keywords: Field Programmable Gate Array, Acceleration, Networking, Embedded Linux

FPGA based hardware accelerator for musical synthesis for Linux system

Work focuses on realizing audio synthesizer in a System on Chip, utilizing FPGA hardware resources. The resulting sound can be polyphonic and can be played directly by an analog connection and is returned to the Hard Processor System running Linux OS. It covers aspects of sound synthesis in hardware and writing Linux Device Drivers for communicating with the FPGA utilizing DMA.

An optimal approach to synthesis is researched and assessed and LUT-based interpolation is asserted as the best choice for this project. A novel State Variable IIR Filter is implemented in Verilog and utilized. Four waveforms are synthesized: sine, square, sawtooth and triangle, and their switching can be done instantaneously. A sample mixer capable of spreading the overflowing amplitudes in phase is implemented. Linux Device Driver conforming to the ALSA standard is written and utilized as a soundcard capable of generating the sound of 24 bits precision at 96kHz sampling speed in real time.

PDF: FPGA based hardware accelerator for musical synthesis for Linux system

Keywords: FPGA, Sound Synthesis, SoC, DMA, SVF